The present invention is directed, in general to integrated circuit packaging, and, more specifically, to a transmission equalization system and an integrated circuit package employing the same.
Reliable operation of electronic devices, especially semiconductor devices, is of a primary importance today. Often the success of a company may depend on the success at which new technology is reliably established, especially in a developing market. Particularly challenging is the general market demand for devices that perform more functions at increasingly faster operating speeds. This demand for increased functionality usually drives the device design toward more complexity, which typically involves higher component densities that may lead to higher packaging densities. Higher densities alone complicate the environment for signal transmissions within the device. The demand for faster signal speeds further exacerbates this condition causing the environments and associated designs that were acceptable at slower signal speeds to cross into the realm of unacceptability.
Signal environments that exist in an integrated circuit die may require special attention to insure that the ever closer proximity of signals will not generate cross-talk or other interference conditions. Although challenging, these on-chip detrimental conditions may be overcome through appropriate layout and shielding designs. High speed, high density packaging substrate design, however, typically involves a constant trade-off between cost and electrical signal integrity requirements. To reduce costs, signals are often routed in a microstrip construction where the signal only references one power or ground plane.
High-speed, high-density substrate design for multilayer, organic flip chip packages also involves constant trade-off between the substrate design rules and electrical signal integrity requirements. Metal planes are frequently used in the substrate stackup for noise shielding and to minimize signal cross-talk. From a signal integrity standpoint, solid metal planes are preferred since they introduce the fewest discontinuities. However, from a substrate manufacturing and reliability standpoint, voided planes are preferred since they promote adhesion between the substrate layers and provide vents for moisture egress at elevated temperatures without causing packaging delamination. Therefore, there is a trade-off between signal integrity and substrate integrity in the design of a substrate.
When a four-layer package substrate is used in a packaging assembly configuration, the traces routed on the top layer are typically subject to several discontinuities in their electrical environment. One source of discontinuity is the microstrip trace routing from the central area employing a semiconductor die to the extremities of the package over a single power or ground plane. The microstrip conductors are often routed in pairs to accommodate a differential signal employed between the two conductors. In this configuration, if either one of the pair of conductors experiences a different electrical environment from an environmental discontinuity, a signal imbalance condition typically occurs. This signal imbalance provides a distortion that may cause signal errors, enhanced reflected noise and losses during signal transmission. Of course, similar problems may occur with multilayer boards having more than four layers or that employ strip line configurations.
Voids in the voided planes typically have a uniform cross-section and display a uniform pattern with respect to the metal sheet. However, these voids typically impact each of a pair of conductors that reside in a layer above in a random manner. This randomness causes an environmental discontinuity thereby providing a different electrical environment to each of the pair of conductors. This causes a signal imbalance condition having the adverse effects mentioned above.
Accordingly, what is needed in the art is a way to provide a metal layer having voids or apertures that does not differentially distort the electrical environment associated with a pair of conductors.
To address the above-discussed deficiencies of the prior art, the present invention provides a transmission equalization system for use with an integrated circuit package employing a substrate. In one embodiment, the transmission equalization system includes a signal transmission subsystem having a pair of transmission line conductors located in the substrate and employing a differential electrical signal. The transmission equalization system also includes an equalization subsystem located proximate the pair of transmission line conductors and employing at least one aperture positioned and oriented to provide a substantially equivalent transmission environment for each of the pair of transmission line conductors.
In another aspect, the present invention provides a method of manufacturing an integrated circuit package. The method of manufacturing includes providing a substrate. The method further includes forming at least a pair of transmission line conductors in the substrate and positioning and orienting at least one aperture proximate the pair of transmission line conductors to provide a substantially equivalent transmission environment for each of the pair of transmission line conductors.
In yet another aspect, the present invention provides an integrated circuit package that includes a substrate. The integrated circuit package also includes a transmission equalization system with a signal transmission subsystem having a pair of transmission line conductors located in the substrate and employing a differential electrical signal. The transmission equalization system also includes an equalization subsystem located proximate the pair of transmission line conductors that employs at least one aperture positioned and oriented to provide a substantially equivalent transmission environment for each of the pair of transmission line conductors.
The foregoing has outlined, rather broadly, preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject of the claims of the invention. Those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiment as a basis for designing or modifying other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.